Class PortMatcher

Inheritance Relationships

Base Type

  • public MatchCallback

Class Documentation

class sc_ast_matchers::PortMatcher : public MatchCallback

Class PortMatcher.

This class identifies a SystemC module’s port declaration, and nested submodules as well.

Public Types

typedef std::vector<std::tuple<std::string, PortDecl*>> MemberDeclType

A vector of tuples that holds the name of the port, and a pointer to PortDecl.

Public Functions

inline const MemberDeclType &getClockPorts() const

Returns the identified clock ports.

inline const MemberDeclType &getInputPorts() const

Returns the identified input ports.

inline const MemberDeclType &getOutputPorts() const

Returns the identified output ports.

inline const MemberDeclType &getInOutPorts() const

Returns the identified inout ports.

inline const MemberDeclType &getOtherVars() const

Returns the identified variables that are not ports or signals.

inline const MemberDeclType &getSignals() const

Returns the identified signals.

inline const MemberDeclType &getSubmodules() const

Returns the identified submodules.

inline const MemberDeclType &getInputStreamPorts() const

Returns the identified sc_stream input ports.

inline const MemberDeclType &getOutputStreamPorts() const

Returns the identified sc_stream output ports.

inline const MemberDeclType &getPorts() const

Returns the identified ports.

inline PortMatcher()

Default constructor.

inline auto makeFieldMatcher(llvm::StringRef name)

AST matcher to detect field declarations.

inline auto makeSignalArrayType(const std::string &name)

This is a matcher to identify sc_signal. The reason for this matcher is for it to match arrays of sc_signals as well. The conditions are as follows:

  • It must be a FieldDecl

    • It must have a type that is either an array whose type is a c++ class derived from a class name called “name”

    • Or, it is has a type that is a c++ class that is derived from class name “name”.

inline auto signalMatcher(const std::string &name)
inline auto makeSignalMatcher(llvm::StringRef name)
inline auto makeArrayTypeMatcher(const std::string &name)
inline auto portNameMatcher(const std::string &name)

This is a matcher for sc_port. It has the following conditions:

  • It must be a FieldDecl

    • It has a type that is an array whose type has a name “name”

    • Or, it has a type that is a C++ class whose class name is “name”.

I’m not sure how to do 1d,2d,3d array matching other than the way it is done. The key idea is to see that there is an arrayType() within an arrayType(), and so on.

inline auto makePortHasNameMatcher(llvm::StringRef name)
inline auto makePortHasNamedDeclNameMatcher(llvm::StringRef name)

This is a matcher for sc_in_clk since it uses a NamedDecl. It has the following conditions:

  • It must be a FieldDecl,

    • It has a type that is an array whose type has a name “name”.

    • Or, it has a type that is a NamedDecl whose name is “name”.

inline auto makeArraySubModule(llvm::StringRef name)
inline auto makeMemberIsSubModule()
template<typename NodeType>
inline auto checkMatch(const std::string &name, const MatchFinder::MatchResult &result)
inline void printTemplateArguments(MemberDeclType &found_ports)
template<typename T>
inline auto parseTemplateType(const T *fd)
template<typename T>
inline void insert_port(MemberDeclType &port, T *decl, bool isFieldDecl = true)
inline void registerMatchers(MatchFinder &finder)
inline virtual void run(const MatchFinder::MatchResult &result)
inline void dump()

Public Members

MemberDeclType clock_ports_

Separate out the member declarations found within a SystemC module.

MemberDeclType in_ports_
MemberDeclType out_ports_
MemberDeclType inout_ports_
MemberDeclType other_fields_
MemberDeclType signal_fields_
MemberDeclType instream_ports_
MemberDeclType outstream_ports_
MemberDeclType sc_ports_
MemberDeclType submodules_

Store the declaration of submodules.