Class VerilogTranslationPass¶
Defined in File verilog_tranlation.py
Inheritance Relationships¶
Base Type¶
public parselib.transforms.top_down.TopDown(Class TopDown)
Class Documentation¶
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parselib.transforms.verilog_tranlation.VerilogTranslationPass : public parselib.transforms.top_down.TopDown Translate low-level format of the _hdl.txt into Verilog Note that type defs are already expanded at this point, so all htypeinfo/htype should only include primitive types This pass does not perform any tree transformation that alters the semantics, but **only** generates Verilog
Public Functions
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__init__(self)¶
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start(self, tree)¶
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modulelist(self, tree)¶
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nonrefexp(self, tree)¶
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hmethodcall(self, tree)¶
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blkassign(self, tree)¶
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syscwrite(self, tree)¶
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numlitwidth(self, tree)¶
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hliteral(self, tree)¶ stops at literal, it is some kinds of terminal
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hvarref(self, tree)¶
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syscread(self, tree)¶ syscread: hsigassignr, token
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harrayref(self, tree)¶
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hsigassignl(self, tree)¶
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hbinop(self, tree)¶
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hunop(self, tree)¶
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hcstmt(self, tree)¶
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get_current_ind_prefix(self)¶
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casevalue(self, tree)¶
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switchbody(self, tree)¶
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casestmt(self, tree)¶
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switchcond(self, tree)¶
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switchstmt(self, tree)¶
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stmt(self, tree)¶
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hnoop(self, tree)¶
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whilestmt(self, tree)¶
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stmts(self, tree)¶
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inc_indent(self)¶
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dec_indent(self)¶
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push_indent(self)¶ used to service temporary indent removal, such as that in for condition
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pop_indent(self)¶
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ifstmt(self, tree)¶
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forinit(self, tree)¶
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forcond(self, tree)¶
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forpostcond(self, tree)¶
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forbody(self, tree)¶
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forstmt(self, tree)¶
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hsensvars(self, tree)¶
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npa(self, tree)¶
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hsensedge(self, tree)¶
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hsenslist(self, tree)¶
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hprocess(self, tree)¶
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htype(self, tree)¶
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hreturnstmt(self, tree)¶
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vardeclinit(self, tree)¶
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moduleinst(self, tree)¶
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vardecl(self, tree)¶
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prevardecl(self, tree)¶
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htypeinfo(self, tree)¶
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hfunctionparams(self, tree)¶
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hfunction(self, tree)¶
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hmodule(self, tree)¶
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